Asynchronous Protocols for “Structured ASIC” Platforms

Abstract

Large and complex digital circuits require new modular architectures to integrate various building block modules with different requirements regarding the clock frequency. The paper presents the selection of the asynchronous communication protocol that allows to use GALS (Globally Asynchronous Locally Synchronous) architectures on “structured ASIC” (Application Specific Integrated Circuit) platforms to create a new class of digital circuits that can address the issues of large circuit design.